Finfet Based Sram Design for Low Power Applications

نویسنده

  • SHRUTI OZA
چکیده

Industry demands Low-Power and HighPerformance devices now-a-days. Among the various embedded memory technologies, SRAM provides the highest performance along with low standby power consumption. In CMOS circuits, high leakage current in deep-submicron regimes is becoming a significant contributor to power dissipation due to reduction in threshold voltage, channel length, and gate oxide thickness. FinFET based SRAM design can be used as an alternative solution to the bulk devices. FinFET is suitable for nanoscale memory circuits design due to its reduced Short Channel Effects (SCE) and leakage current. As the impact of process variations become increasingly significant in ultra deep submicron technologies, FinFETs are becoming increasingly popular a contender for replacement of bulk FETs due to favorable device characteristics.The paper focuses on study of various design aspects of FinFET based SRAM. KeywordsFinFET, Low Power, Memory, SRAM.

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

New SRAM Cell Design for Low Power and High Reliability using 32nm Independent Gate FinFET Technology

This paper proposes new methods for SRAM cell design in FinFET technology. One of the most important features of FinFET is that the independent front and back gates can be biased differently to control the current and the device threshold voltage. By controlling the back gate voltage of a FinFET, a SRAM cell can be designed for low power consumption. This paper proposes a new 8T (8 transistors)...

متن کامل

Leakage Current And Dynamic Power Analysis Of Finfet Based 7t Sram At 45nm Technology

As technology is scaled down, the importance of leakage current and power analysis for memory design is increasing. In this paper, we discover an option for low power interconnect synthesis at the 45nm node and beyond, using Fin-type Field-Effect Transistors (FinFETs) which are a promising substitute for bulk CMOS at the considered gate lengths. We consider a mechanism for improving FinFETs eff...

متن کامل

MODELING AND SIMULATION OF FinFET SRAM FOR NANOSCALE DEVICES

Sub-threshold leakage and process-induced variations in bulk-Si technology limit the scaling of SRAM into sub-32 nm nodes. New device architectures are being considered to improve control Vt and reduce short channel effects. Among the likely candidates, FinFETs are the most attractive option because of their good scalability and possibilities for further SRAM performance and yield enhancement t...

متن کامل

IJSRD - International Journal for Scientific Research & Development| Vol. 2, Issue 08, 2014 | ISSN (online): 2321-0613

As CMOS electronic devices are continuously shrinking to nanometer regime, leads to increasing the consequences of short channel effects and variability due to the process parameters which lead to cause the reliability of the circuit as well as performance. To solve these issues of CMOS, FINFET is one of the promising and better technologies without sacrificing reliability and performance for i...

متن کامل

Comparison of Conventional 6T SRAM cell and FinFET based 6T SRAM Cell Parameters at 45nm Technology

When working for low power application the main estimation is to reduce leakage components and parameters. This stanza explores a vast link towards low leakage power SRAM cells using new technology and devices. The RAM contains bi-stable cross coupled latch which has V_th higher in write mode access MOSFET (Metal Oxide Semiconductor Field Effect Transistor) and lower V_th in read access mode MO...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2014